FPGA for the Digital Oscilloscope

FPGA

The oscilloscope has a Xilinx FPGA  Spartan-3AN-50-TQ144. I have chose this FPGA for 2 reasons:

1.  it doesn't need an external Flash memory, making therefore the assembly slightly easy.
2. the package

the negative side of the FPGA are:

1. quite small ( I can't ecpect complex triggering functionality)
2. I can have only 2Kbyte of buffer for each channel. t

As I have designed FPGA for most of my career I believe I can manage to get the best from this small device. I'm using ISE Webpack 13.4. And I've just designed the UART to communicate with an FTDI chip.

Follow a list of register to communicate with the FPGA:

ADDRESS	REG NAME	R/W	D7	D6	D5	D4	D3	D2	D1	D0
0	ID_PRODUCT	R			ID_PRODUCT
1	REV.	R			REVISION
2	CHAN_SEL	W					CH4	CH3	CH2	CH1
3	AC_DC	W								AC/DC
4	ATTN	W						ATTN2	ATTN1	ATTN0
5	TRIG_ARM	W						FORCE	NORM	AUTO
6	TRIG_TYPE	W							FALLING	RISING
7	TRIG_AMPLITUDE	W
8	TRIG_OPTION	W
9	DATA_READY	R

On the next post I will show the Oscilloscope block diagram.