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Monday 18 February 2013

FPGA for the Digital Oscilloscope


FPGA

The oscilloscope has a Xilinx FPGA  Spartan-3AN-50-TQ144. I have chose this FPGA for 2 reasons:
  1.  it doesn't need an external Flash memory, making therefore the assembly slightly easy.
  2. the package
the negative side of the FPGA are:
  1. quite small ( I can't ecpect complex triggering functionality)
  2. I can have only 2Kbyte of buffer for each channel. t
As I have designed FPGA for most of my career I believe I can manage to get the best from this small device. I'm using ISE Webpack 13.4. And I've just designed the UART to communicate with an FTDI chip.
Follow a list of register to communicate with the FPGA:

ADDRESSREG NAMER/WD7D6D5D4D3D2D1D0











0ID_PRODUCTR

ID_PRODUCT




1REV.R

REVISION




2CHAN_SELW



CH4CH3CH2CH1
3AC_DCW






AC/DC
4ATTNW




ATTN2ATTN1ATTN0
5TRIG_ARMW




FORCENORMAUTO
6TRIG_TYPEW





FALLINGRISING
7TRIG_AMPLITUDEW







8TRIG_OPTIONW







9DATA_READYR








On the next post I will show the Oscilloscope block diagram.

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